Capacitors, particularly ultracapacitors and supercapacitors, have in recent years come to be used in a variety of high-power applications, and in particular offer synergies when used with electrochemical cells. Capacitors used in such applicants are generally deployed in series modules, each series module containing some fixed number of capacitors in series.
In a series module of capacitors, if one capacitor fails much earlier than its neighbors, then probably the module has to be taken out of service. It would be very desirable if the life of each capacitor could somehow be made to match that of the longest-lived of its neighbors.
Likewise in a system having several series modules of capacitors, if one module fails much earlier than its neighbors, then probably the failed module has to be taken out of service. It would be very desirable if the life of each module could be made to match that of the longest-lived of its neighbors.
Enormous amounts of time and effort have been expended toward such ends, with only limited success. As one example, an effort can be made to measure characteristics of such capacitors (such as the precise capacitance) and to “bin” them, that is, to group capacitors (to place them in bins) according to the measured characteristics. After the capacitors have been binned, then each module is fabricated using capacitors from a single bin. Although binning can be helpful, it does not come anywhere close to solving the problem, for a number of reasons including that later events can age one capacitor faster than another.
Large amounts of time and effort have likewise been expended toward trying to bring about similar results for electrochemical cells, with varying degrees of success. It is tempting to imagine that any approach that helps with electrochemical cells would help equally with capacitors, and vice versa. But there are many differences between capacitors and electrochemical cells that make it impossible to assume such a thing. Cell-life models are non-identical as between electrochemical and electrostatic cells, for one thing. The relationship between the stored charge and the voltage is generally nearly linear for capacitors and is decidedly extremely nonlinear for electrochemical cells, for another.
References of possible historical interest include the following patents and published patent applications: U.S. Pat. No. 5,479,083 to Brainard, U.S. Pat. No. 5,952,815 to Rouillard, U.S. Pat. No. 5,764,037 to Jacobs, U.S. Pat. No. 5,713,426 to Okamura, U.S. Pat. No. 6,087,799 to Turner, U.S. Pat. No. 3,602,795 to Gunn, U.S. Pat. No. 5,726,552A to Okamura, U.S. Pat. No. 5,063,340A to Kalenowsky, EP1081824 to Rufer, US 2008/197806 to Ridder, US2008/0272735A1 to Roessler, WO2007/145460A1 to Oh, WO2007/145463A1 to Oh, WO2007/145464A1 to Oh, US2004/251934 to Yano, US2006/221516 to Daboussi, US2007/001651 to Harvey, DE10 2008 056962 A1 to Herke, and EP1035627 A1 to Ohta.
Experience has shown that the aging of an ultracapacitor, defined or characterized by the diminution of its capacity and and by an increase of its internal resistance, is accelerated by the voltage applied at its terminals, by its temperature rise during its charge, by its ambient temperature inside the module. Stated differently, cell-life models have been developed which depend at least in part upon a history of applied voltages and upon a history of cell temperatures.
The alert reader will thus appreciate that it may be very helpful to monitor the temperature and voltage, to the extent possible, and to control, to the extent possible, the voltage load imposed upon each of the ultracapacitors. In an assembly of modules connected in series or in parallel, these factors can differ, on the one hand, between the different modules making up the assembly and, on the other hand, between the different ultracapacitors making up a particular module. It would be desirable to attempt to make the factors uniform inside of a module, and between modules, to prevent the premature aging of an ultracapacitor causing the premature aging of a module causing, in turn, the premature aging of an assembly.
Known approaches toward these ends, particularly that of controlling the voltage at the terminals of an ultracapacitor during its charge, include:                passive balancing;        clipping from a predetermined voltage value close to the maximum voltage specified for the ultracapacitor; and        voltage or charge balancing of an ultracapacitor with respect to the neighboring ultracapacitors.        
These last two techniques typically use analog electronic boards. One drawback of any analog electronics associated with ultracapacitors is that it typically is not capable of self-diagnosis. The more complicated the system, the greater the number of components, which implies a reduced average time between failures for the analog electronics.
It will be recalled that in a capacitor, the relationship between stored charge Q and voltage V is (within some dynamic range) very nearly linear, the coefficient being C in the equation Q=CV. We can use this equation to model a particular case where a number of ultracapacitors are in series within a module. From Kirchhofs Law we know that in a simple charging regime, the current through each capacitor in the series string is the same, and thus charge imparted to each capacitor in the series string (being the time integral of the current) is the same. If each capacitor were to have a capacitance C identical to that of its neighbors, then at any given instant we would expect each capacitor to have very nearly the same voltage accumulated upon it.
Now let us assume for sake of discussion that one ultracapacitor within the module has come to have a capacity lower than the average capacity of the other ultracapacitors in the module. If we then assume one or more cycles of a charging current and a discharging current, then the voltage on the low-capacity cell will tend to rise higher on the charges and fall lower on the discharges.
As mentioned above it has been attempted to provide a balancing device with such a series capacitive array. The balancing device may follow a simple algorithm, for example to discharge (to some extent) any capacitor which, at a given moment, is at a higher voltage than the average for the module. The practical result is that for a particular capacitor that is of lower-than-average capacitance, it will get discharged when it is at a high voltage; likewise for a particular capacitor that is of higher-than-average capacitance, it will get discharged when it is at a low voltage. This leads to a useless energy dissipation.
Another approach that has been attempted is simply to control (and to limit) the voltage applied to the module by the circuitry that charges it up. A related but distinct approach that has likewise been attempted is simply to control (and to limit) the amount of charge applied to the module by the circuitry that charges it up. These two approaches affect all of the ultracapacitors of the module, and do not take into account any non-identical characteristics of cells in the module.